Solution to black diamond film delamination problem

ABSTRACT

Low k dielectrics such as black diamond have a tendency to delaminate from the edges of a silicon wafer, causing multiple problems, including blinding of the alignment mark. This problem has been overcome by inserting a layer of silicon nitride between the low k layer and the substrate. A key requirement is that said layer of silicon nitride be under substantial compressive stress (at least 5×10 9 dynes/cm 2 ). In the case of a layer of black diamond, on which material the invention is particularly focused, a nucleating layer is also inserted between the silicon nitride and the black diamond. A process for laying down the required layers is described together with an example of applying the invention to a dual damascene structure.

FIELD OF THE INVENTION

[0001] The invention relates to the general field of low dielectricconstant layers for use in integrated circuits with particular referenceto methods for preventing peeling and delamination of such films.

BACKGROUND OF THE INVENTION

[0002] The internal dimensions within integrated circuits continue toshrink, including the thicknesses of the dielectric layers used toseparate various layers of wiring from one another. However, as thesewiring levels are brought closer together, the possibility ofcross-coupling between them starts to rise as well as the incidence ofparasitic capacitances. One way to minimize this problem is to reducethe dielectric constants of these inter-metal layers. Thus there isconsiderable interest in developing low k materials as well asdeposition methods for them that are compatible with integrated circuittechnology.

[0003] For our purposes we will define a low k dielectric as one thathas a dielectric constant close to or less than about 3. Several suchmaterials are known to exist but they have the disadvantage that theyare organic rather than inorganic compounds. Examples include hydrogensilsesquioxane, fluorinated polyimide, polyarylene ether, fluorinatedarylene ether, polytetrafluoro-ethylene, and benzocyclobutene. Becauseof their organic nature these materials are innately soft, whichphysical property can give rise to problems during semiconductorprocessing, particularly during planarization, by chemical mechanicalpolishing (CMP).

[0004] The present invention is concerned with low dielectric constantmaterials that are inorganic in nature, such as spin-on glass (SOG),fluorinated silicon glass (FSG) and, particularly, methyl-doped poroussilica which is referred to by practitioners of the art as blackdiamond, or BD. When formed as will be described below, about 36% of aBD layer's volume is in the form of pores having a diameter betweenabout 8 and 24 Angstroms.

[0005] Dual damascene structures have received widespread application inrecent years so it is important that processes for laying down lowdielectric constant materials be compatible with such structures. Anexample of a dual damascene structure is schematically illustrated inFIG. 1. See there is a substrate 11 over which two layers of dielectricmaterial 14 and 15 have been deposited. Via hole 14 has been etchedthrough lower dielectric layer 14 and trench 13 (long dimension runningnormal to the plane of the figure)has been etched through upperdielectric layer 15. Via and trench were over-filled with metal (usuallycopper) and then the upper surface was planarized, as shown.

[0006] Inorganic low k dielectrics enjoy several advantages over theorganic variety, such as good thermal conductivity suitability forproduction, but one problem associated with them is that many of them,when in thin film form, are found to be in a state of high tensilestress. This is the case, regardless of how they are deposited. Becauseof this, low k inorganic films have a tendency to delaminate,particularly near the edges of the substrate where the restoring forcesare the strongest. This is illustrated in FIG. 2 which shows siliconwafer 22 which has been coated with a layer of (for example) BD. For a25 cm. wafer, an outer annular region 23, whose width varies betweenabout 0.5 and 2 cm. has a tendency to come away. Aside from the yieldloss in the affected area, the delaminated film is a source ofparticulate contamination and, most importantly, the wafer alignmentmark (shown schematically in the figure as area 24) can easily beobscured (blinded) by this.

[0007] A routine search of the prior art was performed but no referencesthat teach the exact processes and structures of the present inventionwere discovered. Several references of interest were, however,encountered along the way. For example, in U.S. Pat. No. 6,025,280,Brady et al. show a low k oxide process using nitrous oxide and TEOSwith an organic reactant. In U.S. Pat. No. 5,851,892, Lojek et al. showan oxidation process using a nitrogen pre-anneal. Reference to BD wasfound on the web-site for Applied Materials in the form of a pressrelease dated Feb. 28, 2000 describing this material.

SUMMARY OF THE INVENTION

[0008] It has been an object of the present invention to provide aprocess for depositing a layer of low dielectric constant material on asubstrate without subsequent delamination of said layer.

[0009] Another object of the invention has been to provide a process fordepositing a layer of black diamond on a silicon wafer withoutsubsequent delamination of said layer.

[0010] A further object of the invention has been to provide a dualdamascene structure in which the dielectric is black diamond.

[0011] A still further object has been to provide a process for formingsaid dual damascene structure.

[0012] These objects have been achieved by inserting a layer of siliconnitride between the low k layer and the substrate. A key requirement isthat said layer of silicon nitride be under substantial compressivestress (at least 5×10⁹ dynes/cm²). In the case of a layer of blackdiamond, on which material the invention is particularly focused, anucleating layer is inserted between the silicon nitride and the blackdiamond. A process for laying down the required layers is describedalong with an example of applying the invention to a dual damascenestructure.

BRIEF DESCRIPTION OF THE DRAWINGS

[0013]FIG. 1 illustrates a typical dual damascene structure.

[0014]FIG. 2 shows how a low k dielectric film can delaminate from thesurface of a silicon wafer.

[0015]FIG. 3 shows the starting point for the process of the presentinvention.

[0016] FIGS. 4 to 6 show successive stages in the process of the presentinvention.

[0017]FIG. 7 shows the structure that is obtained at the conclusion ofthe process of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] We will disclose the present invention through a description of aprocess for forming a dual damascene structure. At the end of thisdescription the structure of the present invention will also beapparent. We note here that copper-filled damascene structures normallyinclude glue and barrier layers but, since the present invention doesnot depend on their presence in order to be effective, they have notbeen included in our description, thereby simplifying it.

[0019] Referring now to FIG. 3, the process of the present inventionbegins with the provision of substrate 11 which is most commonly, thoughnot necessarily, a silicon wafer. Silicon nitride layer 31 is depositedonto substrate 11 to a thickness between about b 300 and 600 Angstroms.It is a key feature of the invention that this layer be deposited underconditions that ensure that it is in a state of compressive stress ofmagnitude greater than about 5×10⁹ dynes/cm^(2,) with a stress levelbetween about 7×10⁹ and 1.5×10¹⁰ dynes/cm² being preferred.

[0020] The exact method by which the silicon nitride is deposited is notcritical as long as these levels of compressive stress are attained. Onedeposition method that ensures this is PECVD (Plasma Enhanced ChemicalVapor Deposition). We used Applied materials' DX chamber at an RF powerbetween about 500 and 650 watts. Gas flow rates were between about 60and 80 SCCM for silane, between about 2,300 and 2,700 SCCM for nitrogen,and between about 25 and 35 SCCM for ammonia.

[0021] Referring now to FIG. 4, silicon nitride layer 31 is then exposedto a gaseous mixture of methyl silane, nitrous oxide, and oxygen,enhanced by a helium plasma at a power level of about 200 watts, forabout 2 seconds, thereby forming, through chemical vapor deposition,nucleation layer 42 (having a thickness between about 200 and 400Angstroms) on all exposed surfaces of silicon nitride 31. Flow rates forthe gases are: for the methyl silane between about 50 and 90 SCCM, forthe nitrous oxide between about 350 and 400 SCCM, and for the oxygenbetween about 10 and 50 SCCM.

[0022] Then, nucleation layer 42 is exposed to a gaseous mixture ofmethyl silane and nitrous oxide, enhanced by a helium plasma at a powerlevel of about 110 watts, thereby forming on nucleation layer 42,through chemical vapor deposition, a layer of black diamond 44 having athickness between about 2,000 and 6,000 Angstroms. Flow rates for thegases are: for the methyl silane, between about 50 and 90 SCCM and forthe nitrous oxide between about 350 and 400 SCCM.

[0023] Proceeding now to FIG. 5, the two previous deposition steps arerepeated. That is, silicon nitride layer 51 is deposited (to a thicknessbetween about 300 and 600 Angstroms) onto black diamond layer 44 alsounder conditions that ensure that layer 51 is in a state of compressivestress of magnitude greater than about 5×10⁹ dynes/cm² with a stresslevel between about 7×10⁹ and 1.5×10¹⁰ dynes/cm² being preferred. Layer51 is then exposed to a gaseous mixture of methyl silane, nitrous oxide,and oxygen, enhanced by a helium plasma at a power level of about 200watts, for about 2 seconds, thereby forming, through chemical vapordeposition, nucleation layer 52 (to a thickness between about 200 and400 Angstroms) over which is deposited layer of black diamond 55 (havinga thickness between about 2,000 and 6,000 Angstroms).

[0024] Then, still referring to FIG. 5, black diamond layer 55,nucleation layer 52, and silicon nitride layer 51 are all etched througha suitably patterned mask (not shown) down to the level of black diamondlayer 44 to form wiring trench 53.

[0025] The penultimate step of the process is illustrated in FIG. 6.First, via hole 62 is etched through black diamond layer 44, nucleationlayer 42, and silicon nitride layer 31 down to the level of substrate 11(in general a silicon wafer). Copper is then deposited to a thicknesssufficient to fill the via hole and to over-fill the wiring trench.

[0026] The process concludes, as shown in FIG. 7, with the applicationof chemical mechanical polishing to the structure seen in FIG. 6,thereby planarizing said structure and making certain that no copperremains on any exposed surface outside the trench.

[0027] It will be understood by those skilled in the art that theprocess and structure of the present invention are not limited todamascene processes and structures, being of a more general naturewhereby said process may be effectively used to deposit on a substrateany one of a family of low dielectric constant inorganic materials. Inparticular, the process may be used to deposit on a silicon wafer alayer of black diamond that will not subsequently delaminate, whether ornot it includes a damascene structure.

[0028] Furthermore, while the invention has been particularly shown anddescribed with reference to the preferred embodiments thereof, it willbe understood by those skilled in the art that various changes in formand details may be made without departing from the spirit and scope ofthe invention.

What is claimed is:
 1. A process for depositing a layer of lowdielectric constant material on a substrate, comprising: onto saidsubstrate, depositing a layer of silicon nitride that is in a state ofcompressive stress, said stress having a value of at least 5×10⁹dynes/cm²; and then depositing the layer of low dielectric constantmaterial on said silicon nitride layer.
 2. The process recited in claim1 wherein the low k dielectric material is selected from the groupconsisting of spin-on glass, fluorinated silicon glass, black diamond,and poly(arylene ether) polyimide.
 3. The process recited in claim 1wherein the stress value of the silicon nitride layer is between about7×10⁹ and 1.5×10¹⁰ dynes/cm².
 4. The process recited in claim 1 whereinthe step of depositing the layer of silicon nitride further comprisesusing PECVD at an RF power between about 500 and 650 watts with gas flowrates between about 60 and 80 SCCM for silane, between about 2,300 and2,700 SCCM for nitrogen, and between about 25 and 35 SCCM for ammonia.5. The process recited in claim 1 wherein the low k dielectric layer isdeposited to a thickness between about 2,000 and 6,000 Angstroms and thesilicon nitride layer is deposited to a thickness between about 300 and600 Angstroms.
 6. A process for depositing a layer of black diamond on asilicon wafer, comprising: onto said wafer, depositing a layer ofsilicon nitride that is in a state of compressive stress, said stresshaving a value of at least 5×10⁹ dynes/cm² and the silicon nitride layerhaving a thickness between about 300 and 600 Angstroms; exposing saidlayer of silicon nitride to a first gaseous mixture of methyl silane,nitrous oxide, and oxygen, enhanced by a helium plasma at a power levelof about 200 watts, for about 2 seconds, thereby forming, throughchemical vapor deposition, a nucleation layer having a thickness betweenabout 200 and 400 Angstroms on all exposed surfaces of the siliconnitride; and then exposing said nucleation layer to a second gaseousmixture of methyl silane and nitrous oxide, enhanced by a helium plasmaat a power level of about 110 watts, thereby forming, through chemicalvapor deposition, the layer of black diamond.
 7. The process recited inclaim 6 wherein the stress value of the silicon nitride layer is betweenabout 7×10⁹ and 1.5×10¹⁰ dynes/cm².
 8. The process recited in claim 6wherein the step of depositing the layer of silicon nitride furthercomprises using PECVD at an RF power between about 500 and 650 wattswith gas flow rates between about 60 and 80 SCCM for silane, betweenabout 2,300 and 2,700 SCCM for nitrogen, and between about 25 and 35SCCM for ammonia.
 9. The process recited in claim 6 wherein the layer ofblack diamond is deposited to a thickness between about 2,000 and 6,000Angstroms.
 10. The process recited in claim 6 wherein, in the firstgaseous mixture, the methyl silane has a flow rate between about 50 and90 SCCM, the nitrous oxide has a flow rate between about 350 and 400SCCM, and the oxygen has a flow rate between about 10 and 50 SCCM. 11.The process recited in claim 6 wherein, in the second gaseous mixture,the methyl silane has a flow rate between about 50 and 90 SCCM and thenitrous oxide has a flow rate between about 350 and 400 SCCM.
 12. Aprocess for forming a dual damascene structure on a silicon wafer,comprising: (a) onto said wafer, depositing a layer of silicon nitridethat is in a state of compressive stress, said stress having a value ofat least 5×10⁹ dynes/cm², (b) exposing said layer of silicon nitride toa first gaseous mixture of methyl silane, nitrous oxide, and oxygen,enhanced by a helium plasma at a power level of about 200 watts, forabout 2 seconds, thereby forming, through chemical vapor deposition, anucleation layer on all exposed surfaces of the silicon nitride; (c)then exposing said nucleation layer to a second gaseous mixture ofmethyl silane and nitrous oxide, enhanced by a helium plasma at a powerlevel of about 110 watts, thereby forming on the nucleation layer,through chemical vapor deposition, a layer of black diamond; (d)repeating steps (a), (b), and (c), thereby forming upper and lowerlayers of silicon nitride and black diamond; (e) patterning and etchingsaid upper black diamond and silicon nitride layers down to the level ofthe lower layer of black diamond, thereby forming a wiring trench; (f)patterning and etching said lower black diamond and silicon nitridelayers down to the level of the silicon wafer, thereby forming a viahole; (g) depositing a layer of copper to a thickness sufficient to fillthe via hole and to over-fill the wiring trench; and (h) by means ofchemical mechanical polishing, removing copper until said wiring trenchis just filled and there is no copper on any exposed surface outside thetrench.
 13. The process recited in claim 12 wherein the lower layer ofsilicon nitride is deposited to a thickness between about 300 and 600Angstroms and the upper layer of silicon nitride is deposited to athickness between about 300 and 600 Angstroms.
 14. The process recitedin claim 12 wherein the lower layer of black diamond is deposited to athickness between about 2,000 and 6,000 Angstroms and the upper layer ofblack diamond is deposited to a thickness between about 2,000 and 6,000Angstroms.
 15. A dual damascene structure on a silicon wafer,comprising: on said wafer, a lower layer of silicon nitride that is in astate of compressive stress, said stress having a value of at least5×10⁹ dynes/cm²; on the lower layer of silicon nitride, a firstnucleation layer; on said first nucleation layer, a lower layer of blackdiamond; on said lower layer of black diamond, an upper layer of siliconnitride that is in a state of compressive stress, said stress having avalue of at least 5×10⁹ dynes/cm².; on the upper layer of siliconnitride, a second nucleation layer; on said second nucleation layer, anupper layer of black diamond; a wiring trench etched in said upper blackdiamond and silicon nitride layers extending as far as the lower layerof black diamond; a via hole etched in said lower black diamond andsilicon nitride layers extending as far as the silicon wafer; both thetrench and the via hole being just filled with copper; and there beingno copper on any exposed surface outside the trench.
 16. The structuredescribed in claim 15 wherein the stress value of the silicon nitridelayer is between about 7×10⁹ and 1.5×10¹⁰ dynes/cm².
 17. The structuredescribed in claim 15 wherein each nucleation layer has a thicknessbetween about 200 and 400 Angstroms.
 18. The structure described inclaim 15 wherein the lower layer of silicon nitride has a thicknessbetween about 300 and 600 Angstroms and the upper layer of siliconnitride has a thickness between about 300 and 600 Angstroms.
 19. Thestructure described in claim 15 wherein the lower layer of black diamondhas a thickness between about 2,000 and 6,000 Angstroms and the upperlayer of black diamond has a thickness between about 2,000 and 6,000Angstroms.